The present invention relates to circuit design tools. More particularly, the present invention relates to graphical representations of circuit designs described in terms of high-level description language code.
High-level integrated circuit (IC) description languages such as VHDL and Verilog(copyright) are commonly used to design circuits. One embodiment of VHDL is described in greater detail in xe2x80x9cIEEE Standard VHDL Language Reference Manual,xe2x80x9d ANSI Std. 1076-1993, Published Jun. 6, 1994. One embodiment of Verilog(copyright) is described in greater detail in IEEE Standard 1364-1995. These high-level IC description languages allow a circuit designer to design and simulate circuits by using high-level code to describe the structure and/or behavior of the circuit being designed.
The high-level IC description language code is used to produce a netlist that describes an interconnection of circuit components that provide the desired functionality. The netlist can then be used to develop the layout and ultimately fabricate an integrated circuit IC having the functionality of the designed circuit. The netlist can also be used for emulation purposes.
The high-level IC description language code can be used to describe a standalone IC designs or a functional components of a larger IC design. Rather than redesigning circuits for use with new applications, existing circuit designs described in terms of high-level IC description language code can be modified. Modification of existing code can be advantageous, for example, when the existing circuit is used in a new environment or as a part of a larger IC design where inputs and/or outputs are slightly different than in the originally designed application. However, modification of code corresponding to an existing circuit design without the original circuit designer can be difficult because the code may not be well documented or may be extensive and confusing. Therefore, modification of existing circuit design code can be time consuming and difficult.
Circuit designers often communicate the structural and behavioral characteristics of circuit designs in terms of block diagrams, state diagrams and flow charts. These representations are more intuitive and are better suited to communicate the functionality of a circuit than high-level IC description language code. For at least this reason, high-level IC description language code is not effective for communicating circuit designs.
What is needed is a tool that helps decipher existing high-level IC description language code.
A method and apparatus for graphical representation of high-level IC description language code is described. The IC description language code describing an IC design is analyzed. Representation information corresponding to one or more of a block diagram of functional blocks of the IC design, a state diagram of a state machine, and a flow chart of an operational flow of the IC design is extracted from the high-level IC description language code. A graphical representation of the IC design based on the extracted representation information is generated.